Project - Phase 4

due Friday, November 20, 11:59 PM

Submission using Blackboard


Tasks & Deliverables

Based on the block diagram developed in Phase 2 and optimized in Phase 3, and the reference implementation of your hash function written in C
(provided as a part of your hash function package), develop the following deliverables:

1. Full synthesizable code of your hash function's Datapath verified for correct functionality

2. Testbenches necessary to test all major units of your hash function and the entire Datapath

3. Report describing the status of all major units of your hash function (including the entire Datapath) .
     Characterize each unit using the following three categories:

- coded and verified
- coded but not verified (or not fully debugged yet)
- incomplete code
- not coded yet.

4. Reports from synthesis and implementation targeting
      A. Spartan 3
      B. Virtex 4 FX,
   giving preliminary results of your implementation in terms of
a. the smallest device of a given family capable of holding your circuit with the resource utilization smaller or equal to 80%
b. minimum clock period [ns]
c. throughput [Mbit/s]
d. resource utilization [CLB slices, BRAMs, embedded multipliers, DSP units]

Please follow the listed below recommendations:
  1. develop your code using bottom-up approach
  2. locate a portion of the reference C implementation responsible for implementing each major unit of your hash function; use this code to fully understand the functionality of a given unit, and to develop a testbench required to verify its functionality
  3. test your circuit at the highest level of complexity you feel comfortable with; if your higher level circuit does not work, test the functionality of all lower-level components and the correctness of connections among them
  4. test if each of the major blocks and the entire Datapath passes synthesis; verify your circuit using post-synthesis simulation
  5. implement your circuit first using the largest device of each of the following two families:  Spartan 3 and Virtex 4 FX; then find the smallest device of a given family capable of holding your circuit with the resource utilization smaller or equal to 80%.