Course Description:
The exponential growth in the Internet and the telecommunications industry has accelerated the emergence and deployment of high-speed network architectures and protocols that integrate multiple traffic types and provide quality-of-service differentiation. This course covers the current state-of-the-art in emerging high-speed network architectures, protocols and control algorithms. The main goals of the course are:

• to provide an understanding of the key performance and design issues in high-speed network architectures, protocols, and control algorithms.
• to teach the fundamentals of the design and performance evaluation of high-speed switch and router architectures.
• to provide exposure to cutting-edge research on high-speed networks.

Who should take the course:

The course is intended for students majoring in Electrical and Computer Engineering, Computer Science, or a related field at the advanced graduate level. The course provides a foundation for research on current issues related to the modeling, analysis, and design of high speed networks. Students should have a strong background in applied probability and random processes (particularly queueing analysis), as well as the ability to program in MATLAB or a general-purpose programming language such as C, C++, or Java.

Textbook: No textbook is required. Class notes and supplementary material will be made available to students via this web page.

Instructor:  Brian L. Mark
                      Nguyen Engineering Building: Room 3220
                      tel: 703-993-4069,  fax: 703-993-1601
                      email: bmark AT gmu DOT edu
                  Office Hours:   Tuesdays and Thursdays, 3:00-4:00 pm (or by appointment)

Grading:  Homework = 10%, Project = 25%, Midterm = 25%, Final Exam = 40%.