Dimitris Ioannou

Engineering 3248
Office Hours: 
W: 6:00 - 7:00 PM
R: 3:00 - 4:00 PM
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Dimitris E. Ioannou received his BS in Physics (1974), from Thessaloniki University, Greece and his MS (1975) and PhD (1978) in Solid-State Electronics, from Manchester University, UK. Prior to his current position of professor of electrical and computer engineering at George Mason University (Fairfax, VA), he has held positions at Manchester and Middlesex Universities (UK), Democritus University of Thrace (Greece), University of Maryland (USA), and spent his 2001 Spring Semester on sabbatical leave as a visiting professor at the Grenoble Polytechnic (ENSERG), France.

Prof. Ioannou’s main research contributions on rough chronological order include: development of SEM-EBIC techniques for characterizing electrically active defects and measuring the diffusion length in semiconductor materials; techniques for studying deep traps, carrier lifetime and interface states in Silicon on Insulator (SOI); physics and hot carrier reliability of SOI devices, including the discovery of the opposite-channel based carrier-injection and invented a SOI flash memory cell that exploits this phenomenon; development of Schottky and Ohmic contact technology for SiC. His current research interests are on the performance and reliability issues of SOI and bulk CMOS devices and circuits (radiation hardness, hot carriers, negative bias temperature instability, electrostatic discharge protection), and on non-classical (nano-scale) CMOS and the emerging field of nanoelectronics, including nanowire based non-volatile memory. He has authored or coauthored over two hundred and fifty research papers and conference presentations, and advised more than thirty research students.

Prof. Ioannou has been involved with the IEEE Intern. SOI Conference for over fifteen years, including as technical program chairman (SOI’2001) and general chairman (SOI’2002). He is the 2008 Outstanding Research Faculty Award Recipient of the George Mason University Volgenau School of Information Technology and Engineering. He is a Fellow of the IEEE, and in recognition of the importance of his research to semiconductor industry, he has received the IBM faculty award twice.

Possible Advisee Scholarly Paper Topics

  1. Electrostatic Discharge Protection Circuits for CMOS Technologies
  2. Electrostatic Discharge Protection Circuits for SOI CMOS Technologies
  3. Multi-gate SOI nanodevices
  4. SRAM cell design and performance
  5. ESD protection of IC chips


Semester Catalog Coursesort descending Room Lecture Times Syllabus
Spring 2016 ECE 586 Digital Integrated Circuits Innovation Hall 336 R: 4:30 pm - 7:10 pm
Spring 2016 ECE 565 Introduction to Optical Electronics Music Theater Building 1002 W: 7:20 pm - 10:00 pm
Fall 2016 ECE 431 Digital Circuit Design Planetary Hall 126 MW: 1:30 pm - 2:45 pm
Fall 2016 ECE 680 Physical VLSI Design Exploratory Hall L111 R: 4:30 pm - 7:10 pm

MS and PhD Theses

Author Titlesort descending Thesis Link Program Defense Date
Donizetti, Matthew Thomas COMPACT MODELING OF MULTI GATE AND OTHER EMERGING TRANSISTORS Master of Science in Electrical Engineering Saturday, February 12, 2011
Donizetti, Matthew Compact Models of Multi Gate and Other Emerging Transistors Master of Science in Electrical Engineering Tuesday, November 30, 2010
Subba, Niraj Device Physics Considerations on the Performance of SOI Circuits Master of Science in Electrical Engineering Wednesday, November 28, 2001
Zhao, Xuejun Drain Leakage and Hot Carrier Reliability of SOI pMOSFET's Doctor of Philosophy in Information Technology Monday, May 1, 2000


Senior Design Projects

Group Members Title Selected Deliverables Semester
Matthew Carbaugh, Fidele Ngu Beumaa, Earvin Rivas, Christopher Wood Charge Pump Design Spring 2016

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