Kris Gaj

Engineering 3225
Office Hours: 
By appointment only
Home Page:
Research Area: 
Computer Engineering

Kris Gaj received the M.Sc. and Ph.D. degrees in Electrical Engineering from Warsaw University of Technology in Warsaw, Poland. He was a founder of Enigma, a Polish company that generates practical software and hardware cryptographic applications used by major Polish banks. At George Mason University, he does research and teaches courses in the area of cryptographic engineering and reconfigurable computing. His research projects center on new hardware architectures for secret key ciphers (including authenticated ciphers), hash functions, public key cryptosystems (including elliptic curve, pairing, and post-quantum cryptosystems), and codebreaking; as well as benchmarking of cryptographic hardware, computer arithmetic, high-level synthesis, and software/hardware codesign. He is the co-director of the Cryptographic Engineering Research Group - CERG. He has been a PI for multiple sponsored projects funded by NSF, NIST, DoD, and industry. He has been a member of the Program Committees of CHES, CryptArchi, CT-RSA, DSD, FPT, LightSec, PQCrypto, Quo Vadis Cryptology, ReConFig, ReCoSoc, and SPACE; a General Co-chair of CHES 2008 in Washington D.C., a Program Co-chair of CHES 2009 in Lausanne, Switzerland, and a Program Co-chair of SHARCS 2012 in Washington D.C. He is an author of a book on breaking German Enigma cipher during World War II, and a co-author of the book on Cryptographic Engineering. In 2013, he was awarded two patents for new Montgomery Multiplication Architectures.

Possible Advisee Scholarly Paper Topics

  1. High-Level Synthesis of digital systems - languages, tools, benchmarks
  2. Secure distributed storage based on tablets and smart phones
  3. Post-quantum cryptography - hardware and software implementations
  4. Algorithmic countermeasures against side-channel attacks
  5. Software/hardware co-design - case studies
  6. PCI Express and its application for high-speed communication with FPGA-based accelerators
  7. Cache attacks against software implementations of cryptographic algorithms
  8. Certification of cryptographic modules according to FIPS 140-2 and/or Common Criteria - case study of FPGA-based products
  9. Educational apps, e-books, and free software for teaching computer engineering and cryptology
  10. E-book content protection

Possible Senior Design Project Topics

  1. High-speed encryption using FPGA boards


Semester Catalog Course Room Lecture Times Syllabus
Spring 2018 ECE 448 FPGA and ASIC Design with VHDL Blue Ridge Hall 129 MW: 1:30 pm - 2:45 pm
Fall 2018 ECE 545 Digital System Design with VHDL Exploratory Hall L111 M: 7:20 pm - 10:00 pm
Fall 2018 ECE 646 Cryptography and Computer Network Security Exploratory Hall L111 T: 4:30 pm - 7:10 pm

MS and PhD Theses

Author Title Thesis Link Program Defense Datesort ascending
Habib, Bilal Design, Implementation and Analysis of Efficient FPGA Based Physical Unclonable Functions Doctor of Philosophy in Electrical and Computer Engineering Thursday, July 21, 2016
Jarvis, Brian Choice of Optimal Error-Correcting Code for Physical Unclonable Functions Master of Science in Computer Engineering Wednesday, December 9, 2015
Vachharajani, Harsh Implementation and Simulation of Secure Sockets Layer (SSL) in Windows Presentation Foundation Master of Science in Information Security and Assurance Thursday, July 30, 2015
Rogawski, Marcin Development and Benchmarking of New Hardware Architectures for Emerging Cryptographic Transformations Doctor of Philosophy in Electrical and Computer Engineering Thursday, July 25, 2013


Senior Design Projects

Group Members Title Selected Deliverables Semester
Daniel Barcklow, Christopher Fortman, Richard Haeussler, Joshua Herr SDR-based Spectrum Analyzer with Hardware Acceleration Fall 2015
Sree Ram Mohanan, Ahmed Abdelhay, Shanaka Ranaweera, Ishan Ranaweera, John Fornah Autonomous Warehouse Management System (AWMS) Fall 2011

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