ECE 645 Computer Arithmetic
 

Project Presentations

Monday, May 12, 2014
6:00-9:05 PM

The Nguyen Engineering Building, Room 3507

Results of the Contest for the Best Project


Session I
Cryptography & Hardware Security


6:00 - 6:10

Kris Gaj


Welcome & Rules of the Contest for the Best Project

6:10 - 6:25

Brian Jarvis


Analysis, Software Modeling, and FPGA Implementation of Error Correcting Code Encoder and Decoder for Physical Unclonable Functions

6:25 - 6:40

Katayoun Neshatpour


FPGA-optimized Adders and Modular Adders for Long Integers

6:40 - 6:55
Naveen Chandra Vallurupalli

Comparative Analysis of DSP units of Xilinx, Altera, and Microsemi FPGAs
6:55 - 7:15
Refreshments

Session II
Digital Signal Processing


7:15 - 7:30

Ibraheem Darab


Analysis of Xilinx Virtex-6 Implementing Algorithms for Optimizing Optical Pulse Waveforms in a Pulse Position Modulation Laser Communication System

7:30 - 7:45

Jonathan Mitchell


An Exploration of CORDIC, Its Implementation and Uses

7:45 - 8:00

Dheeraj Potluri


Comparative Analysis of CORDIC-based Architectures for Direct Digital Frequency Synthesizer (DDFS) and Comparison with Other Best Architectures

8:00 - 8:15
Dheeraj Naga Prasad Kothapalli

Comparative Analysis of Hardware Architectures for Fast Fourier Transform
8:15 - 8:30
Refreshments

Session III

Decimal Arithmetic


8:30 - 8:45

Jeff Keurian


Decimal 64 Arithmetic Unit

8:45 - 9:00

David Pachowicz


Decimal Floating Point 64 Division

9:00-9:05
Closing Remarks & Refreshments